1
Data sheet acquired from Harris Semiconductor
SCHS129
Features
Unlimited Input Rise and Fall Times
Exceptionally High Noise Immunity
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1
A at V
OL
, V
OH
Description
The Harris CD74HC14, CD74HCT14 each contain 6
inverting Schmitt Triggers in one package.
Pinout
CD54HC14, CD54HCT14, CD74HC14, CD74HCT14
(PDIP, CERDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
PKG.
NO.
CD54HCT14F
-55 to 125
14 Ld CERDIP
F14.3
1A
1Y
2A
2Y
3A
3Y
GND
V
CC
6A
6Y
5A
5Y
4A
4Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
January 1998
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1998
File Number
1781.1
CD74HC14,
CD74HCT14
High Speed CMOS Logic
Hex Inverting Schmitt Trigger
[ /Title
(CD74H
C14,
CD74H
CT14)
/Subject
(High
Speed
CMOS
Logic
Hex
Invert-
4
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . .
20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
20mA
DC Drain Current, per Output, I
O
For -0.5V < V
O
< V
CC
+0.5V
. . . . . . . . . . . . . . . . . . . . . . . . . .
25mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
25mA
DC V
CC
or Ground Current, I
CC
. . . . . . . . . . . . . . . . . . . . . . . . .
50mA
Operating Conditions
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Time, t
r
, t
f
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ms (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ms (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ms (Max)
Thermal Resistance (Typical, Note 3)
JA
(
o
C/W)
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
90
-
CERDIP Package . . . . . . . . . . . . . . . .
130
55
SOIC Package . . . . . . . . . . . . . . . . . . .
120
-
Maximum Junction Temperature (Hermetic Package or Die) . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3.
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
HC TYPES
Input Switch Points
V
T
+
-
-
2
0.7
1.5
0.7
1.5
0.7
1.5
V
4.5
1.7
3.15
1.7
3.15
1.7
3.15
V
6
2.1
4.2
2.1
4.2
2.1
4.2
V
V
T
-
-
-
2
0.3
1.0
0.3
1.0
0.3
1.0
V
4.5
0.9
2.2
0.9
2.2
0.9
2.2
V
6
1.2
3.0
1.2
3.0
1.2
3.0
V
V
H
-
-
2
0.2
1.0
0.2
1.0
0.2
1.0
V
4.5
0.4
1.4
0.4
1.4
0.4
1.4
V
6
0.6
1.6
0.6
1.6
0.6
1.6
V
High Level Output
Voltage CMOS Loads
V
OH
V
T
- or
V
T
+
-0.02
2
1.9
-
1.9
-
1.9
-
V
-0.02
4.5
4.4
-
4.4
-
4.4
-
V
-0.02
6
5.9
-
5.9
-
5.9
-
V
High Level Output
Voltage TTL Loads
-
-
-
-
-
-
-
-
V
-4
4.5
3.98
-
3.84
-
3.7
-
V
-5.2
6
5.48
-
5.34
-
5.2
-
V
CD74HC14, CD74HCT14
5
Low Level Output Voltage
CMOS Loads
V
OL
V
IH
or
V
IL
0.02
2
-
0.1
-
0.1
-
0.1
V
0.02
4.5
-
0.1
-
0.1
-
0.1
V
0.02
6
-
0.1
-
0.1
-
0.1
V
Low Level Output Voltage
TTL Loads
-
-
-
-
-
-
-
-
V
4
4.5
-
0.26
-
0.33
-
0.4
V
5.2
6
-
0.26
-
0.33
-
0.4
V
Input Leakage Current
I
I
V
CC
or
GND
-
6
-
0.1
-
1
-
1
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
6
-
2
-
20
-
40
A
HCT TYPES
Input Switch Points
V
T
+
-
-
4.5
1.2
1.9
1.2
1.9
1.2
1.9
V
5.5
1.4
2.1
1.4
2.1
1.4
2.1
V
V
T
-
4.5
0.5
1.2
0.5
1.2
0.5
1.2
V
5.5
0.6
1.4
0.6
1.4
0.6
1.4
V
V
H
4.5
0.4
1.4
0.4
1.4
0.4
1.4
V
5.5
0.4
1.5
0.4
1.5
0.4
1.5
V
High Level Output
Voltage CMOS Loads
V
OH
V
IH
or
V
IL
-0.02
4.5
4.4
-
4.4
-
4.4
-
V
High Level Output
Voltage TTL Loads
-4
4.5
3.98
-
3.84
-
3.7
-
V
Low Level Output Voltage
CMOS Loads
V
OL
V
IH
or
V
IL
0.02
4.5
-
0.1
-
0.1
-
0.1
V
Low Level Output Voltage
TTL Loads
4
4.5
-
0.26
-
0.33
-
0.4
V
Input Leakage Current
I
I
V
CC
and
GND
-
5.5
-
0.1
-
1
-
1
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0
5.5
-
2
-
20
-
40
A
Additional Quiescent
Device Current Per Input
Pin: 1 Unit Load
I
CC
(Note 4)
V
CC
- 2.1
-
4.5 to
5.5
-
360
-
450
-
490
A
NOTE:
4. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
HCT Input Loading Table
INPUT
UNIT LOADS
nA
0.6
NOTE: Unit Load is
I
CC
limit specified in DC Electrical Specifica-
tions table, e.g., 360
A max at 25
o
C.
CD74HC14, CD74HCT14
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